Patents

1. 發明人: 黃錫瑜, 蒯定明, "記憶體元件之內置自行測試電路", 專利權人: 台灣積體電路製造股份有限公司, 2001/2/11
2. 發明人: 黃錫瑜, 蒯定明, "Rambus DRAM 內建自我測試電路", 專利權人: 台灣積體電路製造股份有限公司, 2001/3/11
3. 發明人: 黃錫瑜, 蒯定明, "記憶體之內置式測試電路及測試方法", 專利權人: 台灣積體電路製造股份有限公司, 2001/4/1
4. US Patent: S.-Y. Huang and Ding-Ming Kwai, "Built-In-Self-Test Circuit for RAMBUS Direct RDRAM", Assignee: Worldwide Semiconductor Manufacturing Corp. , Grant No: US6647524B1 , Nov. 11, 2003.
5. US Patent: S.-Y. Huang and Ding-Ming Kwai, "High Speed Built-In Self-Test Circuit for DRAMs", Assignee: Taiwan Semiconductor Manufacturing Corp. (TSMC) , Grant No: US6351837B1, Nov. 11, 2003.
6. 專利權人: 國立清華大學 , 發明人: 黃錫瑜, 張凱翔, 翁嘉謙, 蘇明毅, "以晶片設計之暫存器傳送層為基礎的功率估算方法及電腦可讀取之記錄媒體", , 專利證號: TW093138923, July 21, 2006.
7. US Patent: Huang et al., "Method and Computer Program Product for Register-Transfer-Level Power Estimation in Chip Design", Assignee: National Tsing Hua U., HsinChu, (TW), Paten No. US 7,370,299 B2, Date of Patent : May 6, 2008.
8. 黃錫瑜, 許軒榮, 涂竣傑: Apparatus for built-in speed grading and method for generating desired frequency for the same, 內建式速度分級裝置及用於產生該裝置之所需頻率的方法. 國立清華大學, TW096112402
9. 發明人: 賴亞群 (Ya-Chun Lai) 黃錫瑜 (Shi-Yu Huang), "去除靜態隨機存取記憶體漏電流影響之電路及方法 (APPARATUS AND METHOD FOR REMOVING IMPACT OF LEAKAGE CURRENT IN STATIC RANDOM ACCESS MEMORY)", (Feb. 21, 2010: TW096102615).
10. (作為發明人之獲證專利) US Patent: US9720038B2, S.-Y. Huang, K.-H. Tsai, W.-T. Cheng, and J.-Y. Lee, "Method and Circuit of Pulse-Vanishing Test", Assignee: Mentor Graphics Corp., (Granted on Aug. 1, 2017, Expired on June 16, 2035).
11. (作為發明人之獲證專利) US Patent: 10317462, S.-Y. Huang, K.-H. Tsai, W.-T. Cheng, and T.-H. Huang, "Wide-Range Clock Signal Generation for Speed Grading of Logic Cores", Assignee: Mentor Graphics Corporation, Filed: May 11, 2017, (Granted on June 11, 2019, Expired on May 30, 2037).
12. (作為發明人之獲證專利) 中華民國發明專利, S.-Y. Huang, K.-H. Tsai, W.-T. Cheng, and T.-H. Huang, "在線監測時脈信號的電子電路", "ELECTRONIC CIRCUIT FOR ONLINE MONITORING A CLOCK SIGNAL", 黃錫瑜,陳韋豪,許竹均，Assignee: 國立清華大學, (公告日： 2021 年 5 月 21 日，期限： 2040 年 9 月 29 日 止。證書號為： I728920 號)
13. (作為發明人之獲證專利) US Patent: 11,287,471 B1, Shi-Yu Huang, Wei-Hao Chen, and Chu-Chun Hsu "Electronic Circuit for Online Monitoring A Clock Signal", Assignee: National Tsing Hua University, Granted on March 29, 2022).
14. (作為發明人之獲證專利) 中華民國發明專利, "具有故障與軟錯誤容忍力的延遲鎖定迴路的電子裝置" ， 黃錫瑜,楊竣宇， Assignee: 國立清華大學。(專利期限: 2022 年 4 月 21 日 至 2040 年 10 月 11 日 止。證書號: I761984 號)
15. (作為發明人之獲證專利) US Patent: 11,190,192 B1, S.-Y. Huang and Jun-Yu Yang, "Electronic Device with Fault and Soft Error Tolerant Delay-Locked Loops", Assignee: National Tsing Hua University, Filed: Oct. 6, 2020, (Granted on Nov. 30, 2021).